1. Field of the Invention
The present invention relates to an imaging device capable of picking up images while electrically enlarging the same. More specifically, the present invention relates to an imaging device used for a video camera, a video tape recorder incorporating a camera and so on which is capable of picking up images subsequently electronically enlarged by using a solid state imaging device such as a CCD (Charge Coupled Device).
2. Description of the Related Art
FIG. 1 is a schematic block diagram showing a conventional imaging device capable of picking up images which are subsequently electrically enlarged. FIG. 2 is a block diagram showing a selector for vertical transfer pulses shown in FIG. 1. FIG. 3 is a schematic block diagram of each of other selectors.
A structure of a conventional imaging device will be described with reference to FIGS. 1 to 3. A timing pulse generating circuit 31 is provided for generating various timing pulses for driving a CCD image sensor 36. A reference clock signal 2F.sub.CK having a frequency of 2F.sub.CK is applied to the timing pulse generating circuit 31 from a crystal oscillating circuit 40. The crystal oscillating circuit 40 includes a crystal oscillator X, resistances R.sub.1 and R.sub.2, capacitors C.sub.1 and C.sub.2 and an inverter, not shown, in the timing pulse generating circuit. A horizontal driving pulse HD and a vertical driving pulse VD are applied to the timing pulse generating circuit 31 from a synchronizing signal generating circuit (SSG), not shown. The timing pulse generating circuit 31 outputs vertical transfer pulses V.sub.1 to V.sub.4, horizontal transfer pulses H.sub.1 and H.sub.2, a reset pulse R, a clock pulse CLK, sampling pulses SP.sub.1 and SP.sub.2, a F.sub.H /2 pulse and a reading pulse TG in response to the reference clock signal 2F.sub.CK, the horizontal driving pulse HD and the vertical driving pulse VD. The vertical transfer pulses V.sub.1 to V.sub.4 and the F.sub.H /2 pulse are applied to a selector 32 for vertical transfer pulses.
The selector 32 for the vertical transfer pulses is provided for switching vertical transfer pulses in normal image pickup and an enlarged image pickup. A select signal is inputted to the selector 32 for this purpose. The select signal becomes low "L" level in normal image pickup while it becomes high "H" level in enlarged image pickup. More specifically, the selector 32 for the vertical transfer pulses includes two selectors 32a and 32b, as shown in FIG. 2. When the select signal becomes "L" level during normal image pickup, inputs A are selected at respective outputs Y of the selectors 32a and 32b. When the select signal becomes "H" level during enlarged image pickup, inputs B are selected for respective outputs Y. Therefore, in normal image pickup, the A input is selected for the Y output of the selector 32a to be "L". Further, by this "L" level signal, the A input is also selected for the Y output of the selector 32b, thereby providing the vertical transfer pulse.
Meanwhile, for the enlarged image pickup, B input is selected for the output of the selector 32a to provide the F.sub.H /2 pulse. The F.sub.H /2 pulse has a period of 2H (H: one horizontal scanning period) which alternately becomes "L" level and "H" level at every 1H. Therefore, the A input and the B input ("H" level signal or "L" level signal) are switched at every 1H for the Y output of the selector 32b. Consequently, vertical transfer pulses are outputted at every 2H.
The horizontal transfer pulses H.sub.1 and H.sub.2 and the reset pulse R generated from the timing pulse generating circuit 31 are applied to a selector 34 for the horizontal transfer pulses and for the reset pulse. The clock pulse CLK generated from the timing pulse generating circuit 31 is applied to a selector 38 for the clock pulse CLK and the sampling pulses SP.sub.1 and SP.sub.2 are applied to a selector 39 for color separating pulses. Select signals are respectively inputted to the selector 34 for the horizontal transfer pulse and for the reset pulse, the selector 38 for the clock and to the selector 39 for the color separating pulse.
Each of the selector 34 for the horizontal transfer pulse and the reset pulse, the selector 38 for clocks and the selector 39 for the color separation pulse includes a 1/2 divider 41 and a selector 42, as shown in FIG. 3. In the normal image pickup, the selector 42 selects A input to output the same at the output Y, whereby respective pulses are directly outputted. Meanwhile, in the enlarged image pickup, the selector 42 selects the B input to output the same at the output Y, whereby a pulse signal provided by dividing the input pulse by the 1/2 divider 41 is outputted. Consequently, horizontal transfer is carried in a period which is doubled as compared with the normal image pickup, and the vertical transfer is carried out once in every 2H. Therefore, a signal is outputted in which a 1/4 region in a corner of the display screen is enlarged twice (fourfold in the area).
The vertical transfer pulses V.sub.1 to V.sub.4 outputted from the selector 32 for the vertical transfer pulses and the reading pulse TG generated from the timing pulse generating circuit 31 are applied to a vertical transfer driver 33 to be inverted and mixed. Further driving signals .phi.V.sub.1 to .phi.V.sub.4 are applied to a CCD image sensor 36. The horizontal transfer pulses H.sub.1, H.sub.2 and the reset pulse R selected in the selector 34 for the horizontal transfer pulses and for the reset pulse are amplified by a horizontal transferring and resetting driver 35 to be applied to the CCD image sensor as driving signals .phi.H.sub.1, .phi.H.sub.2 and .phi.R.
The CCD image sensor 36 includes a plurality of photodiodes serving as light receiving elements arranged in the horizontal and vertical directions as shown in FIG. The sensor applies image signals VO of the picked up images to a S/H circuit 37. A clock signal selected by a selector 38 for the clock is applied to the S/H circuit 37. Since the output signal VO from the CCD image sensor 36 includes not only a signal component but also a clock component including reset component and a field through component, the S/H circuit 37 is provided for separating and extracting a signal component having less low frequency distortion and superior S/N. This is achieved by clamping the field through component and thereafter by sampling and holding the signal component.
The signal component of the output signal VO from the CCD image sensor 36 has negative polarity, which is inverted by the S/H circuit 37. Whereby a signal having positive polarity is outputted as a precut to be applied to a signal processing circuit, not shown. A selector 39 for color separating pulses applies sampling pulses SP.sub.1 and SP.sub.2 outputted in response to a select signal to the signal processing circuit.
FIG. 4 shows an arrangement of complementary color filters provided on a CCD image sensor, and FIG. 5 shows a structure of the CCD image sensor.
Complementary color filters such as shown in FIG. 4 are arranged on the CCD image sensor 36 shown in FIG. 1, and photodiodes 50a are provided corresponding to the colors of the complementary color filters. Namely, a plurality of photodiodes 50a, 50a . . . are arranged in horizontal and vertical directions to form a matrix. Vertical registers 51a, 51a . . . and reading gates 52a, 52a . . . are provided corresponding to the photodiodes 50a, 50a . . . , and the vertical transfer pulses V.sub.1 to V.sub.4 are alternately applied to the respective vertical registers 51, 51 . . . . Charges stored in adjacent photodiodes in the vertical direction, for example in the photodiode 50acorresponding the vertical transfer pulse V.sub.1 and in the corresponding to the vertical transfer pulse V.sub.1 and in the photodiode 50a corresponding to the vertical transfer pulse V.sub.3, are mixed to provide charges of 1 pixel in a horizontal line.
A reading pulse TG is applied to the reading gate 52a coupling the photodiode 50a and the vertical register 51a. The charges stored in the photodiode 50a are read to the vertical register 51a in response to the reading pulse TG. The charges read to the vertical registers 51a are successively transferred to the horizontal register 53. Horizontal transfer pulses H.sub.1 and H.sub.2 are applied to the horizontal register 53 and the horizontal register 53 transfers image signals of 1 line in response to the horizontal transfer pulses H.sub.1 and H.sub.2. The combination of the photodiodes 50a in reading are different in odd fields and even fields by 0.5 horizontal line, as shown in FIG. 4, thereby realizing interlace.
FIG. 6 is a diagram of waveforms showing timings of the pulses in association with the horizontal transfer. FIG. 7 is a diagram of waveforms showing the timings of the pulses in association with the vertical transfer near the vertical blanking period in normal image pickup. FIG. 8 is a diagram of waveforms showing timings of the pulses in association with the vertical transfer near the vertical blanking period in enlarging image pickup. FIG. 9 is a diagram of waveforms showing the timings near the HD in normal image pickup. FIG. 10 is a diagram of waveforms showing timings near HD in enlarging image pickup.
The relationship between various timings in a conventional image pickup device will be described in the following with reference to FIGS. 1 to 10. As shown in FIG. 6, the pulses in association with the horizontal transfer include horizontal transfer pulses H.sub.1, H.sub.2, the reset pulse R, the clock signal CLK, the clamping pulse CDS, the sample and holding pulse S/H and the sampling pulses SP.sub.1 and SP.sub.2. The clamping pulse CDS is provided in synchronization with the rise of the clock signal CLK in the S/H circuit 37 shown in FIG. 1. The sample and holding pulse S/H is provided in synchronization with the fall of the clock signal CLK. The period of the horizontal transfer pulse H.sub.1 corresponds to the period of 1 pixel in the horizontal direction of the CCD image sensor 36.
The output signal VO from the CCD image sensor 36 includes not only the signal component but also the clock component including the reset component and the field through component as shown in FIG. 6(d). However, the field through component is clamped and the signal component is sampled and held by the S/H circuit 37, so that the signal component having less low frequency distortion and superior S/N can be separated and extracted. Since the signal component of the output signal VO has negative polarity, the polarity is inverted by an inverting amplifier included in the S/H circuit 37 to be provided as a signal having positive polarity.
When images are to be picked up are enlarged twice, the periods of the pulses in association with the horizontal transfer are doubled as compared in the normal image pickup, by respective selectors 34, 38 and 39. Consequently, information of horizontal 1 line is read in a time period of 2H. Therefore, it will be a signal doubled in the horizontal direction when viewed in 1H.
The pulses in association with the vertical transfer will be described in the following. The F.sub.CK signal generated from the timing pulse generating circuit 31 is applied to a synchronizing signal generating circuit. By dividing the F.sub.CK signal in the synchronizing signal generating circuit, a vertical driving pulse VD and a horizontal driving pulse HD are provided. In normal image pickup, vertical transfer is carried out once in every 1H by the vertical transfer pulses V.sub.1 to V.sub.4 (V.sub.2 to V.sub.4 are not shown) shown in FIG. 7(c) in synchronization with the horizontal driving pulse HD shown in FIG. 7(b) during the vertical blanking period shown in FIG. 7(a). Reading is also carried out once in every 1V (one vertical scanning period) by the reading pulse TG during the vertical blanking.
Meanwhile, in the twice enlarging image pickup, vertical transfer is carried out once in every 2H by the vertical transfer pulses V.sub.1 to V.sub.4 (V.sub.2 to V.sub.4 are not shown) of FIG. 8(c). Namely, information of the horizontal lines is read in 2V, so that signals enlarged twice in the vertical direction are provided when viewed 1V.
In the normal image pickup, the horizontal transfer pulses H.sub.1 and H.sub.2 have a rest period, as shown in FIGS. 9(b) and (c), during which period vertical transfer is carried out by the vertical transfer pulses V.sub.1 to V.sub.4. An optical black clamp pulse OBCP shown in FIG. 9(d) is outputted from the synchronizing signal generating circuit and applied to an optical black clamping circuit in a signal processing circuit, not shown. The optical black clamp pulse corresponds to the final 30 pixels or so of the horizontal pixels, so that clamping is carried out for these pixels by the optical black clamp pulse OBCP to provide the black reference level (pedestal level) in signal processing.
The video signals will subsequently be described. In the horizontal component of a video signal, signals of 1H out of the signals of 2H in enlarging image pickup are unnecessary. Signals of 1V out of 2V signals are also unnecessary in the vertical component. Therefore, as for the horizontal component, the time in which the unnecessary signal component is to be outputted is interpolated with signals delayed by 1H by a 1H delay circuit and an analog switch and the like, to provide continuous signals. As for the vertical component, the charges of the unnecessary signals are vertically transferred at high speed during the vertical blanking period, by a high speed vertical transfer pulse such as shown in FIG. 8(c) interposed in the vertical transfer pulse, to eliminate the unnecessary signal component. Now, the high speed vertical transfer in this case means successive vertical transfer in the reverse direction, by which unnecessary charges are discharged to an overflow drain (not shown) provided in the CCD image sensor 36. This is a popular method used to discharge unnecessary charges in a high speed electrical shutter.
FIG. 11 is a diagram of waveforms showing timings of the vertical transfer pulses for transferring charges in the CCD in the forward direction and, FIG. 12 is a diagram of waveforms showing timings of the vertical transfer pulses for transferring in the reverse direction.
The operation of the CCD image sensor 36 will be described in the following. Charges are stored in the vertical registers 51a shown in FIG. 5 while the vertical transfer pulses V.sub.1 to F.sub.4 are at the "L" level. In the diagram of waveforms of FIG. 11, charges are stored in the vertical registers 51 which are below these electrodes to which the vertical transfer pulses V.sub.2 and V.sub.3 are applied, at first. The "L" level portion of the vertical transfer pulses V.sub.1 to V.sub.4 moves in the order of [V.sub.2, V.sub.3 ].fwdarw.[V.sub.2, V.sub.3, V.sub.4 ].fwdarw.[V.sub.3, V.sub.4 ].fwdarw.[V.sub.3, V.sub.4, V.sub.1 ].fwdarw.[V.sub.4, V.sub.1 ].fwdarw.[V.sub.4, V.sub.1, V.sub.2 ].fwdarw.[V.sub.1, V.sub.2 ].fwdarw.[V.sub.1, V.sub.2, V.sub.3 ].fwdarw.[V.sub.2, V.sub.3 ], whereby forward transfer of horizontal 1 line is completed. In the example shown in FIG. 12, the "L" level portion of the vertical transfer pulses V.sub.1 to V.sub.4 moves in the order of [V.sub.2, V.sub.3 ].fwdarw.[V.sub.1, V.sub.2, V.sub.3 ].fwdarw.[V.sub.1, V.sub.2 ].fwdarw.[V.sub.4, V.sub.1, V.sub.2 ] .fwdarw.[V.sub.4, V.sub.1 ].fwdarw.[V.sub.3, V.sub.4, V.sub.1 ].fwdarw.[V.sub.3, V.sub.4 ].fwdarw.[V.sub.2, V.sub.3, V.sub.4 ].fwdarw.[V.sub.2, V.sub.3 ], whereby reversal transfer of horizontal 1 line is completed. The twice enlarging image pickup in both horizontal and vertical directions can be carried out by the above described method. FIG. 13 is a diagram of waveforms showing reading timings of odd fields. FIG. 14 is a diagram of waveforms showing reading timings of even fields.
Referring to FIG. 13, in the odd fields, the charges stored in the photodiodes 50a corresponding to the vertical transfer pulse V.sub.3 are read by setting the reading pulse TG at the "L" level to be stored in the vertical registers 51a below those electrodes to which the vertical transfer pulses V.sub.2 and V.sub.3 are applied. Thereafter, the "L" level portion moves in the order of [V.sub.2, V.sub.3 ].fwdarw.[V.sub.1, V.sub.2, V.sub.3 ].fwdarw.[V.sub.1, V.sub.2 ].fwdarw.[V.sub.4, V.sub.1, V.sub.2 ].fwdarw.[V.sub.4, V.sub.1 ], whereby reverse transfer of a horizontal 0.5 line is carried out. Subsequently, the charges read from the photodiodes 50a corresponding to the vertical transfer pulse V.sub.3 are stored in the vertical registers 51a below those electrodes to which the vertical transfer pulses V.sub.4 and V.sub.1 are applied. Thereafter, charges stored in the photodiodes 50a corresponding to the vertical transfer pulse V.sub.1 are read in the similar manner, to be stored in the vertical registers 51a below those electrodes to which the vertical transfer pulses V.sub.4 and V.sub.1 are applied. Consequently, the charges read from the photodiodes 50a corresponding to the vertical transfer pulse V.sub.1 are mixed with the charges read from the photodiodes 50a corresponding to the vertical transfer pulse V.sub.3.
Thereafter, the "L" level portion of the vertical transfer pulses V.sub.1 to V.sub.4 moves in the order of [V.sub.4, V.sub.1 ][V.sub.4, V.sub.1, V.sub.2 ].fwdarw.[V.sub.1, V.sub.2 ].fwdarw.[V.sub.1, V.sub.2, V.sub.3 ].fwdarw.[V.sub.2, V.sub.3 ], whereby a forward transfer of horizontal 0.5 line is carried out. Consequently, the charges read from the photodiodes 50a corresponding to the vertical transfer pulses V.sub.1 and V.sub.3 are stored in the vertical registers 51a below these electrodes to which the vertical transfer pulses V.sub.2 and V.sub.3 are applied.
Referring to FIG. 14, in the even fields, the charges read from the photodiodes corresponding to the vertical transfer pulses V.sub.3 are stored in the vertical registers 51abelow these electrodes to which the vertical transfer pulses V.sub.4 and V.sub.1 are applied by the forward transfer of horizontal 0.5 line in the order of [V.sub.2, V.sub.3 ].fwdarw.[V.sub.2, V.sub.3, V.sub.4 ].fwdarw.[V.sub.3, V.sub.4 ].fwdarw.[V.sub.3, V.sub.4, V.sub.1 ].fwdarw.[V.sub.4, V.sub.1 ]. Thereafter, the charges read from the photodiodes 50a corresponding to the vertical transfer pulse V.sub.1 are mixed with the charges read from the photodiodes 50a corresponding to the vertical transfer pulse V.sub.3. The charges read from the photodiodes 50a corresponding to the vertical transfer pulses V.sub.3 and V.sub.1 are stored in the vertical registers 51a below those electrodes to which the vertical transfer pulses V.sub.2 and V.sub.3 are applied by the reversal transfer of horizontal 0.5 line in the order of [V.sub.4, V.sub. 1 ].fwdarw.[V.sub.3, V.sub.4, V.sub.1 ].fwdarw.[V.sub.3, V.sub.4 ].fwdarw.[V.sub.2, V.sub.3, V.sub.4 ].fwdarw.[V.sub.2, V.sub.3 ] controlling the timings during reading. The combination of the photodiodes 50a in the odd fields and the even fields is shifted by 0.5 line, as the photodiodes 50a corresponding to the vertical transfer pulses V.sub.1 and V.sub.3 are selected for the odd fields and the photodiodes 50a corresponding to the vertical transfer pulses V.sub.3 and V.sub.1 are selected for the even fields, thereby realizing interlacing.
However, the above described conventional image pickup device exhibits the following drawbacks. Namely, the electrically enlarging function is to enlarge a 1/4 area at a corner of the screen by two times (fourfold in area). Therefore, enlargement of a central portion cannot be carried out, as compared with a case of optical enlargement. Therefore, it is not very good especially when an image enlarged by optical zooming is further enlarged by this method. Further, when a 1/4 area in the upper left corner of the screen as shown in FIG. 5A is enlarged twice, the rest period of the horizontal transfer becomes longer and a hatched region appears on the left side of the screen as shown in FIG. 5B.
In the enlarging image pickup, signals interpolated by the 1H delay circuit or the like are used. Therefore, the same signals are provided for the horizontal 2 lines as the luminance signals, for example. Consequently, when the combination of the photodiodes is changed in the odd fields and the even fields, sometimes an extra horizontal line of even or odd field appears dependent on the video signals, causing jitters between fields. As a result, the images are not very nice to look at.
If the timing of a select signal for switching between the normal image pickup and the enlarging image pickup is not proper, the switching may possibly be carried out at an intermediate portion of the video signals. This causes disturbance of the video signals and therefore the resulting images will be not nice to look at.